ARM JTAG Pinout

This page contains information on the commonly used connectors and pin outs for JTAG Boundary Scan testing and debug of hardware employing the ARM family of processors. If you do not see the pin out you are looking for, please request it in the comments section.

ARM 20 Pin Connector Pin Out

This is a header commonly used with the ARM Family Processors such as the TI OMAP:

1 (VREF) Voltage Reference    (VSUPPLY) Supply Voltage 2

3 (nTRST) Test Reset          (GND) Ground 4

5 (TDI) Test Data In          (GND) Ground 6

7 (TMS) Test Mode Select      (GND) Ground 8

9 (TCK) Test Clock            (GND) Ground 10

11(RTCK) Return Clock         (GND) Ground 12

13(TDO) Test Data Out         (GND) Ground 14

15(nSRST) System Reset        (GND) Ground 16

17(DBGRQ) Debug Request       (GND) Ground 18

19(DGBACK)Debug Acknowledge   (GND) Ground 20


ARM 14 Pin Connector Pin out

1 (VREF) Voltage Reference       (VSUPPLY) Supply Voltage 2

3 (nTRST) Test Reset                  (GND) Ground 4

5 (TDI) Test Data In                      (GND) Ground 6

7 (TMS) Test Mode Select            (GND) Ground 8

9 (TCK) Test Clock                       (GND) Ground 10

11 (TDO) Test Data Out              (nSRST ) System Reset 12

13 (VREF) Voltage Reference     (GND ) Ground 14

Please visit our JTAG pinouts and Connectors page for additional information.

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