What is Boundary Scan JTAG

 

What do the terms: JTAG, Boundary Scan and IEEE 1149.1 mean?

You have probably heard the terms:

  • Boundary Scan
  • JTAG
  • IEEE 1149.1

But what do they mean and how did they come about?

This post and video answers that question.

Some History

JTAG is an acronym for Joint Test Action Group. This group was a consortium of companies: TI, DEC, AT&T and others who came together in the 80′s to tackle the issue of declining coverage from in-circuit test machines due to surface mount chip packaging and advancing PCB technology.

The Problems Solved by Boundary Scan JTAG

As ICs became more complex, more pins were needed. This drove chip manufacturers to produce surface mount packages like ball grid array (BGA). Since the pins are on the underside of these packages and typically impossible to reach a new way to test was needed.

In addition to the new packages, boards were becoming more complicated with more layers and more components. The result was fewer test points were available for the ICT tester to probe.

The Solution

The JTAG group espoused Boundary Scan JTAG  testing as a solution to these vexing problems and this later evolved into IEEE 1149.1.

Stay tuned for our next post on the uses of JTAG and Boundary Scan Technology.

http://www.youtube.com/watch?v=TFDK2OjIxjE

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