<?xml version="1.0" encoding="UTF-8"?><rss version="2.0"
	xmlns:content="http://purl.org/rss/1.0/modules/content/"
	xmlns:dc="http://purl.org/dc/elements/1.1/"
	xmlns:atom="http://www.w3.org/2005/Atom"
	xmlns:sy="http://purl.org/rss/1.0/modules/syndication/"
		>
<channel>
	<title>Comments on: JTAG Defined &#124; An Introduction to JTAG</title>
	<atom:link href="http://www.etoolsmiths.com/blog/jtag-defined/feed/" rel="self" type="application/rss+xml" />
	<link>http://www.etoolsmiths.com/blog/jtag-defined/</link>
	<description>JTAG and Boundary-Scan Tools</description>
	<lastBuildDate>Mon, 23 Aug 2010 05:53:37 +0000</lastBuildDate>
	<sy:updatePeriod>hourly</sy:updatePeriod>
	<sy:updateFrequency>1</sy:updateFrequency>
	<generator>http://wordpress.org/?v=3.0.1</generator>
	<item>
		<title>By: C.M.Garland</title>
		<link>http://www.etoolsmiths.com/blog/jtag-defined/comment-page-1/#comment-2881</link>
		<dc:creator>C.M.Garland</dc:creator>
		<pubDate>Tue, 13 Jul 2010 01:06:49 +0000</pubDate>
		<guid isPermaLink="false">http://www.etoolsmiths.com/blog/?p=11#comment-2881</guid>
		<description>What are the signal levels, data rates and line impedances for the Test Access Ports?.    Are there any recommendations for Transient &amp; ESD protection of the TAPs?</description>
		<content:encoded><![CDATA[<p>What are the signal levels, data rates and line impedances for the Test Access Ports?.    Are there any recommendations for Transient &amp; ESD protection of the TAPs?</p>
]]></content:encoded>
	</item>
	<item>
		<title>By: JTAG Connector Pinouts</title>
		<link>http://www.etoolsmiths.com/blog/jtag-defined/comment-page-1/#comment-1850</link>
		<dc:creator>JTAG Connector Pinouts</dc:creator>
		<pubDate>Tue, 21 Jul 2009 05:21:47 +0000</pubDate>
		<guid isPermaLink="false">http://www.etoolsmiths.com/blog/?p=11#comment-1850</guid>
		<description>[...] JTAG Signals [...]</description>
		<content:encoded><![CDATA[<p>[...] JTAG Signals [...]</p>
]]></content:encoded>
	</item>
	<item>
		<title>By: Boundary Scan &#124; Boundary Scan Test and Debug</title>
		<link>http://www.etoolsmiths.com/blog/jtag-defined/comment-page-1/#comment-465</link>
		<dc:creator>Boundary Scan &#124; Boundary Scan Test and Debug</dc:creator>
		<pubDate>Thu, 14 Aug 2008 18:35:32 +0000</pubDate>
		<guid isPermaLink="false">http://www.etoolsmiths.com/blog/?p=11#comment-465</guid>
		<description>[...] circuit boards (PCBs). To address this vexing problem, a consortium of companies&#8211;known as the Joint Test Access Group or JTAG was [...]</description>
		<content:encoded><![CDATA[<p>[...] circuit boards (PCBs). To address this vexing problem, a consortium of companies&#8211;known as the Joint Test Access Group or JTAG was [...]</p>
]]></content:encoded>
	</item>
</channel>
</rss>
