Prototype PCB Ready for JTAG Boundary SCAN test
Prototype Printed Circuit Boards are early versions of electronic circuits that need to be debugged and tested.
Electronic product manufactures (OEMs) typically send the files product by their schematic capture package as the create the circuit design to a circuit board FAB or Prototype house for prototype pcb assembly.
Often so-called quick turn PCB Fab houses are used to deliver the first versions of the circuit board as quickly as possible.
When the new boards arrive from the Contract Manufacturer, hardware engineers then need to verify that the initial prototypes work as expected. This process, called prototype debug, is explained below:
Review Test Reports from the CM
Depending on the cost of the board and the importance of quality as weighed against cost, the OEM may chose to equip the CM with test equipment and tests for the initial run of hardware.
Optionally, CMs may development test fixtures and tests for the OEM under contract. In each case the new new boards can be tested before they are sent to the OEM and a test report is produced. Before bringing up the board for the first time, an engineer can consult these reports to see if there are any problems with the board. Based on the report, the engineer my make changes to the prototype to correct problems found before powering up the system.
Perform Visual Inspection
When new prototypes are received, they are often inspected to verify all components are correctly fitted and that there re no obvious errors.
First Prototype Power-up
Next an Engineer will apply Power to the board for the first time. Often called the “smoke test”, because if there is a serious problems there may actually be smoke as components fail!
JTAG Boundary SCAN Test and Debug
IEEE 1149.1 JTAG Boundary SCAN test is typically used to debug complex hardware designs, especially if the designs lack test points an/or have surface mount devices. JTAG Boundary SCAN is great because it allows the chips on the board to be used to test other parts of the circuit.
To support the JTAG “pins out” test methodology, the prototype must include at least on device that supports IEEE 1149.1 and also provide access to the device via the JTAG pins: (TDI, TDO, TMS, TCLK and optionally TRST). JTAG Test tools also require a boundary scan description language file or BSDL file that describes how IEEE 1149.1 is implemented on the device along with a net list file describing how all the devices are connected in the circuit.
Boundary SCAN can be used to:
- Program and Configure devices such as: FPGAs, CPLDs, FLASH, etc.
- Test for open shorts and stuck at failures
- Functionally test devices like RAM, FLASH, Ethernet etc.
Functional Test
Functional tests in addition to those supported by Boundary SCAN can also be run on the board. These tests are typically used to test the system “at speed” which in some cases will be difficult to do with Boundary SCAN. Functional tests are implemented by loading and running code on a microprocessor in the system. the code can be loaded by a JTAG Tool if required.
Re-spin and repeat until release
Based on the number and type of errors found with the prototype board, a re-spin of the board may be needed. Changes are made to the circuit design and layout to address any issues found in initial prototype testing. The board is then sent out to be built and the test process repeats until the board is ready to ship.
Full Production tests for manufacturing
Once the board is determined to be ready for volume manufacturing, a test strategy is implemented. The methods include, but are not limited to:
- In-circuit Test (ICT)
- JTAG Boundary SCAN test
- Functional test
- XRAY and Optical inspection
