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	<title>Learn About JTAG</title>
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	<link>http://www.etoolsmiths.com</link>
	<description>JTAG and Boundary-Scan Tools</description>
	<pubDate>Mon, 22 Dec 2008 08:13:57 +0000</pubDate>
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		<title>Boundary Scan</title>
		<link>http://www.etoolsmiths.com/blog/boundary-scan/</link>
		<comments>http://www.etoolsmiths.com/blog/boundary-scan/#comments</comments>
		<pubDate>Thu, 14 Aug 2008 18:35:27 +0000</pubDate>
		<dc:creator>admin</dc:creator>
		
		<category><![CDATA[Boundary Scan]]></category>

		<category><![CDATA[JTAG]]></category>

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		<description><![CDATA[Boundary Scan
What is Boundary-Scan, What is it used for? Boundary Scan is used to test, program and debug printed circuit boards (PCBs).
Let&#8217;s begin with a bit of history on why Boundary Scan came about.
Why is Boundary Scan Needed
Back in the late 80&#8217;s and early 90&#8217;s, several developments in Circuit Board technology came together to make [...]]]></description>
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		<title>JTAG Defined</title>
		<link>http://www.etoolsmiths.com/blog/jtag-defined/</link>
		<comments>http://www.etoolsmiths.com/blog/jtag-defined/#comments</comments>
		<pubDate>Mon, 11 Aug 2008 14:05:58 +0000</pubDate>
		<dc:creator>admin</dc:creator>
		
		<category><![CDATA[JTAG]]></category>

		<guid isPermaLink="false">http://www.etoolsmiths.com/blog/?p=11</guid>
		<description><![CDATA[JTAG What is it?
JTAG is an acronym that stands for &#8220;Joint Test Access Group&#8221;.
Group&#8211;in this case&#8211;was a group of vendors focused on problems found when testing electronic circuit boards. Key members included: TI, Intel and others.
JTAG is the informal name often used to describe the standard that resulted from the work of this group. Specifically, [...]]]></description>
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		<item>
		<title>JTAG Boundary-Scan Vs. JTAG Emulation (ICE)</title>
		<link>http://www.etoolsmiths.com/blog/jtag-boundary-scan-vs-jtag-emulation-ice/</link>
		<comments>http://www.etoolsmiths.com/blog/jtag-boundary-scan-vs-jtag-emulation-ice/#comments</comments>
		<pubDate>Sat, 04 Aug 2007 20:36:33 +0000</pubDate>
		<dc:creator>admin</dc:creator>
		
		<category><![CDATA[Boundary Scan]]></category>

		<guid isPermaLink="false">http://www.etoolsmiths.com/blog/jtag-boundary-scan-vs-jtag-emulation-ice/</guid>
		<description><![CDATA[One question that I often hear is: “What’s difference between JTAG Boundary-Scan Test and JTAG Emulation or a JTAG ICE?”
First off, these two methods share common functions such as: hardware bring-up, device programming and even some basic hardware test functionality. The big difference is that test systems are designed to do extensive hardware testing of [...]]]></description>
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		<item>
		<title>Design for Test (DFT)</title>
		<link>http://www.etoolsmiths.com/blog/design-for-test-dft/</link>
		<comments>http://www.etoolsmiths.com/blog/design-for-test-dft/#comments</comments>
		<pubDate>Thu, 12 Jul 2007 09:47:21 +0000</pubDate>
		<dc:creator>admin</dc:creator>
		
		<category><![CDATA[Circuit Board Test]]></category>

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		<description><![CDATA[When designing new hardware that employs Ball Grid Array (BGA) devices, it is  critical to adhere to design for test (DFT) guidelines. DFT guidelines allow you  to design your board in such a way that the highest possible percentage of your  hardware is tested. Many Boundary Scan Test tool vendors provide design [...]]]></description>
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