#
# Guardian Flash programming example for 405EP bubinga
#
#	play ppc_405ep_bubinga_flash.def
#
# 
#guard_on
#
# set up flash parameters
opt wsaddr 0xD0000000    # workspace address(in IRAM)
opt wssize 0x1000        # workspace size		
opt fltout 0x1e          # timeout for flash operations
opt fltype AMD29F        # flash type/algorithm
opt flssize 0x10000      # size of a sector
opt flnsec 0x8           # number of sectors(if not specified in the command)
opt flwidth 8            # flash with is 8 bits

# turn workspace on and set up a large tftp buffer space(for speed)
opt flwork on            # turn workspace on
opt tbufsiz   32

# if for some reason, workspace is not available, 
#  turn off workspace, and reduce the tftp buffer size(to prevent timeouts)
#opt flwork off           # turn workspace off
#opt tbufsiz   2

# set the base address for the uboot image
opt flbase 0xFFF80000

# make sure a TLB exists for FLASH
@play ppc_405ep_bubinga.def

opt mmu off # assume no tlb for flash

# if we can ID the part, we should be able to program and erase
fl -id 0xFFF80000


# erase the 8 sectors that cover uboot
fl -es 0xFFF80000 0x8

# make sure IRAM is intialized for workspace programming
#
#  These "wr.4" lines to enable internal RAM at 0xD0000000
#  This space can be used as workspace for fast flash programming
#
wr.4 :dcr 0x1a 0xd0000000          # ocm0_dsarc : on-chip 4K RAM to 0xD0000000(data)
wr.4 :dcr 0x1b 0xc0000000          # ocm0_dscntl: on-chip 4K RAM, enabled, 2 clock cycles(data)
wr.4 :dcr 0x18 0xd0000000          # ocm0_isarc : on-chip 4K RAM to 0xD0000000(inst)
wr.4 :dcr 0x19 0xc0000000          # ocm0_iscntl: on-chip 4K RAM, enabled, 2 clock cycles(inst)

# program the uboot image
fl -p u-boot_bubinga.bin 0xFFF80000 -BIN


#guardoff